1 ps8775e 02/23/07 features ? designed for low voltage operation: 1.2v to 3.6v ? universal bidirectional level shifting without direction control ? fast bus speeds up to 180 mbps ? drive capability 12ma ? independent transition of each bit ? each supply rail is con gurable over supply range ? esd protection exceeds jesd22 ? 2000v human body model (a114-b) ? 200v machine model (a115-a) ? latch-up performance exceeds 100ma per jesd 78 ? industrial operation at ?40c to +85c ? packaging (pb-free & green): ? 56-pin plastic 240-mil tssop (a56) ? 56-contact plastic 197-mil tqfn (zf56) pi4uls3v16 description pericom semiconductor?s pi4uls3v16 is a 16-bit (dual-octal) non-inverting bus transceiver with two separate supply rails. a port (v cca ) and b port (v ccb ) are set to operate at 1.2v to 3.6v. this arrangement permits universal bidirectional translation of differential signal levels over the voltage ranges. pi4uls3v16 is designed for asynchronous communication between data buses. data is transmitted from the a bus to the b bus, or vice versa, without direction control. all a x , and b x are tri-stated when data is coming from both directions at the same time. the output-enable (oe) input is used to disable outputs so buses are isolated. the control pins, x sel, x oe, test_en and out_sel are supplied by v ccb . to ensure the high-impedance state during power-up or power- down, the output-enable (oe) input should be tied to v cc through a pullup resistor. applications ? voltage translation ? bus relay block diagram 1.2v to 3.6v universal bi-directional level shifter with automatic direction control to seven other channels 1 b 1 1 a 1 2 b 1 2 a 1 to seven other channels 1 oe tst 2 oe tst testing and loading logic 1 sel out_sel 2 sel test_en 1 sel out_sel 2 sel test_en testing and loading logic 07-0052
2 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control pin con guration - tssop supply voltage range: v cca .................... ?0.5v to 4.6v v ccb .................... ?0.5v to 4.6v input voltage range, v i (1) control inputs ...... ?0.5v to 4.6v voltage range applied to any i/o pins in the high-impedance or power-off state, v io (1) : a port ....................... ?0.5v to 4.6v b port ................... ?0.5v to 4.6v voltage range applied to any i/o pins in the high or low state v io (1, 2) : a port ......... ?0.5v to v cca +0.5v b port ....... ?0.5v to v ccb +0.5v note: 1. the input negative voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. this value is limited to 3.6v maximum. 3. the package thermal impedance is calculated in accordance with jesd 51. 4. stresses greater than those listed under maximum rat ings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those in di cat ed in the operational sec tions of this spec i t ca tion is not im plied. exposure to absolute maximum rating conditions for ex tend ed periods may affect reliability. maximum ratings (absolute maximum ratings over operating free-air temperature range, unless otherwise noted) input clamp current, i ik (v i <0) ................................... ?50ma output clamp current, i ok (v o <0) .............................. ?50ma continuous output current, i o ....................................... 20ma continuous current through v cca, v ccb or gnd ..... 100ma package thermal impedance, 0 ja (3) : a package ............................. 82c/w zf package ........................... 33c/w storage temperature range, t stg .................... ?65c to 150c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 out_sel 1 oe v cca 1 a 1 1 a 2 gnd 1 a 3 1 a 4 v cca 1 a 5 1 a 6 gnd 1 a 7 1 a 8 2 a 1 2 a 2 gnd 2 a 3 2 a 4 v cca 2 a 5 2 a 6 gnd 2 a 7 2 a 8 v cca 2 oe tst a 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 test_en 1 sel v ccb 1 b 1 1 b 2 gnd 1 b 3 1 b 4 v ccb 1 b 5 1 b 6 gnd 1 b 7 1 b 8 2 b 1 2 b 2 gnd 2 b 3 2 b 4 v ccb 2 b 5 2 b 6 gnd 2 b 7 2 b 8 v ccb 2 sel tst b pin con guration - tqfn 1 b 2 gnd 1 b 3 1 b 4 v ccb 1 b 5 1 b 6 gnd 1 b 7 1 b 8 2 b 1 2 b 2 gnd 2 b 3 2 b 4 v ccb 2 b 5 2 b 6 gnd 2 b 7 1 a 2 gnd 1 a 3 1 a 4 v cca 1 a 5 1 a 6 gnd 1 a 7 1 a 8 2 a 1 2 a 2 gnd 2 a 3 2 a 4 v cca 2 a 5 2 a 6 gnd 2 a 7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 2 b 8 v ccb 2 sel tst b tst a 2 oe v cca 2 a 8 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 1 b 1 v ccb 1 sel test_en out _sel 1 oe v cca 1 a 1 07-0052
3 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control truth table (1) inputs outputs loading (2) operation x oe 2 sel 1 sel ll l c l 50pf bus b data to bus a, or bus a data to bus b llh c l 30pf lh l c l 20pf lhh c l 10pf h x x z (isolation) notes: 1. h = high signal level l = low signal level x = don't care or irrelevant z = high impedance 2. refer to figure 1 for output loading chart pin description pin name description x oe 3-state output enable inputs (active low) x sel outputs loading selection x a x side a inputs/outputs x b x side b inputs/outputs test_en enable test mode out_sel output impedance selection gnd ground v cca, v ccb power tst x internal test pins. for normal usage, please tie to ground. test mode / output impedance select test_en out_sel condition l l normal operation low output impedance 300 l h normal operation high output impedance 2.2k h l test_mode a b h h test_mode b a 07-0052
4 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control recommended operating conditions (1, 2, 3) parameter description v cci min. max. units v cca , v ccb supply voltage 1.2 3.6 v v ih high-level input voltage i/o pins 1.2v to 1.95v 0.65 x v cci 2.3v to 2.7v 1.7 2.7v to 3.6v 2 v il low-level input voltage i/o pins 1.2v to 1.95v 0.35 x v cci 2.3v to 2.7v 0.7 2.7v to 3.6v 0.8 v ihb high-level input voltage control inputs (oe and sel) 1.2v to 1.95v 0.65 x v ccb 2.3v to 2.7v 1.7 2.7v to 3.6v 2 v ilb low-level input voltage control inputs (oe and sel) 1.2v to 1.95v 0.35 x v ccb 2.3v to 2.7v 0.7 2.7v to 3.6v 0.8 v i input voltage i/o pins and control inputs 0 3.6 v o output voltage i/o pins and control inputs 0 3.6 i oh high-level output current i/o pins v cco = 1.2v -3 ma v cc = 1.4v -5 v cco = 1.65v -8 v cco = 2.3v -9 v cco = 3.0v -12 i ol low-level output current i/o pins v cc = 1.2v -3 v cco = 1.4v 5 v cco = 1.65v 8 v cco = 2.3v 9 v cco = 3.0v 12 ?v/? t input transition rise or fall rate 10 v/ns t a operating free-air temperature -40 85 c notes: 1. v cci is the v cc associated with the data input port. 2. v co is the v cc associated with the date output port. 3. to ensure proper device operation, all unused device inputs must be held at v cci or gnd. 07-0052
5 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control electrical characteristics for (over recommended free-air temperature range, unless otherwise noted.) (3) parameter description test conditions v cca/ v ccb min. typ. (1) max. units v oh high-level output voltage i oh = -100a 1.2v to 3.6v v cco - 0.1v v i oh = -2ma 1.2v 0.8 i oh = -4ma 1.4v 1 i oh = -7ma 1.65v 1.2 i oh = -9ma 2.3v 1.8 i oh = -12ma 3.0v 2.4 v ol low-level output voltage i ol = 100a 1.2v to 3.6v 0.2 i ol = 2ma 1.2v 0.1 i ol = 4ma 1.4v 0.4 i ol = 7ma 1.65v 0.4 i ol = 9ma 2.3v 0.4 i ol = 12ma 3.0v 0.4 i cc quiescent supply current v i = v cci or gnd, i o = 0 1.2v to 3.6v 10 a i i control inputs (oe and sel) v i = v ccb or gnd 1.2v to 3.6v 5 i oz (2) 3-state output current v o = v cco or gnd 1.2v to 3.6v 10 c in control input capacitance v i = v ccb or gnd 3 pf c io i/o capacitance v o = v cca/b or gnd 5 notes: 1. all typical values are at t a = 25c. 2. for i/o ports, the parameter i oz includes the input leakage current. 3. parameters are speci ed under test mode conditions. 07-0052
6 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control timing characteristics for v cca = 1.8v 0.15v (over recommended free-air temperature range, unless otherwise noted.) parameter from (input) to (output) v ccb = 1.2v v ccb = 1.5v 0.1v v ccb = 1.8v 0.15v v ccb = 2.5v 0.2v v ccb = 3.3v 0.3v units typ min. max. min. max. min. max. min. max. t pd a b 8 1.0 6.0 0.5 5.5 0.5 5.0 0.5 4.5 ns b a 6 1.0 6.0 0.5 5.5 0.5 5.0 0.5 4.5 t sk(a) (1) 0.25 0.25 0.25 0.25 t sk(b) (1) 0.2 0.2 0.2 0.2 f max 10pf load b a 25 35 45 55 65 mhz a b 30 40 45 50 55 timing characteristics for v cca = 2.5v 0.2v (over recommended free-air temperature range, unless otherwise noted.) parameter from (input) to (output) v ccb = 1.2v v ccb = 1.5v 0.1v v ccb = 1.8v 0.15v v ccb = 2.5v 0.2v v ccb = 3.3v 0.3v units typ min. max. min. max. min. max. min. max. t pd a b 8 1.0 5.5 0.5 5.0 0.5 4.5 0.5 4.0 ns b a 6 1.0 5.5 0.5 5.0 0.5 4.5 0.5 4.0 t sk(a) (1) 0.25 0.25 0.25 0.25 t sk(b) (1) 0.2 0.2 0.2 0.2 f max 10pf load b a 30 40 50 75 80 mhz a b 40 50 55 75 80 note: 1. this is the skew between any two outputs of the same package, and switching in the same direction. for t sk(a) , output 1 and output 2 are any two outputs. for t sk(b) , output 1 and output 2 are in the same bank. these parameters are warranted but not production tested. timing characteristics for v cca = 1.5v 0.1v (over recommended free-air temperature range, unless otherwise noted.) parameter from (input) to (output) v ccb = 1.2v v ccb = 1.5v 0.1v v ccb = 1.8v 0.15v v ccb = 2.5v 0.2v v ccb = 3.3v 0.3v units typ min. max. min. max. min. max. min. max. t pd a b 8 1.0 7.0 1.0 6.5 1.0 6.0 1.0 5.0 ns b a 6 1.0 7.0 1.0 6.5 1.0 6.0 1.0 5.5 t sk(a) (1) 0.3 0.3 0.3 0.3 t sk(b) (1) 0.25 0.25 0.25 0.25 f max 10pf load b a 25 30 40 50 60 mhz a b 30 30 35 40 40 07-0052
7 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control operating characteristics ( v cca and v ccb = 2.5v, t a = 25c) parameter test conditions typ. units cpd (1) (v cca ) power dissipation capacitance a to b outputs enabled c l = 0 f = 10 mhz 15 pf outputs disabled 2 power dissipation capacitance b to a outputs enabled 30 outputs disabled 10 cpd (1) (v ccb ) power dissipation capacitance a to b outputs enabled c l = 0 f = 10 mhz 30 pf outputs disabled 10 power dissipation capacitance b to a outputs enabled 15 outputs disabled 2 timing characteristics for v cca = 3.3v 0.3v (over recommended free-air temperature range, unless otherwise noted.) parameter from (input) to (output) v ccb = 1.2v v ccb = 1.5v 0.1v v ccb = 1.8v 0.15v v ccb = 2.5v 0.2v v ccb = 3.3v 0.3v units typ min. max. min. max. min. max. min. max. t pd a b 7 1.0 5.0 0.5 4.5 0.5 4.0 0.5 3.5 ns b a 6 1.0 5.0 0.05 4.5 0.5 4.0 0.5 3.5 t sk(a) (1) 0.25 0.25 0.25 0.25 t sk(b) (1) 0.2 0.2 0.2 0.2 f max 10pf load b a 30 40 55 80 90 mhz a b 40 60 65 80 90 note: 1. this is the skew between any two outputs of the same package, and switching in the same direction. for t sk(a) , output 1 and output 2 are any two outputs. for t sk(b) , output 1 and output 2 are in the same bank. these parameters are warranted but not production tested. notes: 1. this parameter is speci ed under test mode conditions. 07-0052
8 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control parameter measurement information figure 1. load circuit and voltage waveforms voltage waveforms propagation delay times notes: ? c l includes probe and jig capacitance. ? waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. ? all input pulses are supplied by generators having the following characteristics: prr 10mz, z o = 50, tr 2.5ns, tf 2.5ns. ? the outputs are measured one at a time with one transition per measurement. ? t plz and t phz are the same as t dis. ? t pzl and t pzh are the same as t en . ? t plh and t phl are the same as t pd . ? v cci de nes the input port (v cca or v ccb ). ? v cco de nes the output port (v cca or v ccb ). v cca /v ccb c l 1.2v ~ 1.6v 1.8v 0.15v 2.5v 0.2v 3.3v 0.3v 10pf 20pf 30pf 50pf test circuit for t pd / t sk c l s1 output open input t plh t phl v cci /2 v cci /2 v cci v cco /2 v cco /2 0v v oh v ol output 07-0052
9 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control 07-0052
10 ps8775e 02/23/07 pi4uls3v16 1.2v to 3.6v, universal bi-directional level shifter with automatic direction control ordering information ordering code packaging code package description pi4uls3v16a a 56-pin, 240-mil wide plastic tssop PI4ULS3V16AE a pb-free & green, 56-pin, 240-mil wide plastic tssop pi4uls3v16zfe zf pb-free & green, 56-contact, 197-mil wide plastic tqfn notes: ? thermal characteristics can be found on the company web site at www.pericom.com/packaging/ ? e = lead-free and green ? adding x suf x = tape/reel pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com description: 56-contact, thin fine pitch quad flat no-lead (tqfn) package code: zf56 document control #: pd-2024 revision: b date: 03/03/06 07-0052
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